1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same. In particular, the present invention relates to a semiconductor device including feedthrough electrodes penetrating a semiconductor substrate, and a method of manufacturing the same.
2. Description of the Related Art
Referring to a perspective view of FIG. 13, a description will be given of a circuit device 100 in which a conventional semiconductor device 105 is incorporated. This technology is described for instance in Japanese Patent Application Publication No. 2004-102345.
The circuit device 100 has a structure in which the semiconductor device 105 is mounted on a surface of a land 112 placed in a center portion. From both ends of the land 112, leads 101B and 101D are led to an outside. Furthermore, leads 101A and 101C are located at both sides of the land 112. Moreover, the entire circuit device 100 is covered with a sealing resin 104.
The semiconductor device 105 is a bipolar transistor here, and emitter, collector, and base electrodes are formed on a surface thereof. The collector and the base electrodes formed on the surface of the semiconductor device 105 are connected to the leads 101C and 101A through thin metal wires 103. In addition, the emitter electrodes of the semiconductor device 105 are connected to the land 112 through the thin metal wires 103. Here, the two emitter electrodes formed on the surface of the semiconductor device 105 are connected to the land 112 through the thin metal wires 103. Moreover, the emitter electrodes are connected to a grounding potential in order to obtain a voltage gain and a current gain.
However, in the circuit device 100 in which the above-described semiconductor device 105 is incorporated, there is a problem that the land 112 becomes larger compared to the semiconductor device 105 and that this inhibits a miniaturization of the circuit device 100. Specifically, regions for bonding the thin metal wires 103 must be ensured in a peripheral portion of the land 112 in order to connect the emitter electrodes of the semiconductor device to the land 112. Accordingly, in a case where a two-dimensional size of the semiconductor device 105 is 0.3 mm×0.3 mm, a two-dimensional size of the land 112 needs to be not less than approximately 1.5 mm×1.5 mm. That is, the land 112 having an area approximately 25 times as large as that of the semiconductor device 105 mounted thereon is required. This has inhibited the miniaturization of the entire circuit device 100.
Furthermore, there has been a problem that parasitic inductance components occur in the thin metal wires 103 and that high-frequency characteristics of the semiconductor device 105 are deteriorated. Magnitudes of the parasitic inductances caused by the thin metal wires 103 are proportional to lengths of the thin metal wires 103 and inversely proportional to diameters of the thin metal wires 103. Accordingly, for example, if the long and thin metal wires 103 having diameters of 25 μm and lengths of 1 mm are employed, large parasitic inductances occur, and the high-frequency characteristics of the semiconductor device 105 is deteriorated. In particular, in a case of the semiconductor device 105 which is operated at high frequencies of not less than 1 GHz, the high-frequency characteristics are greatly deteriorated by the parasitic inductances.